25Gbps Multi-Link and Multi-Protocol PHY IP for TSMC 7nm FinFET

2017-05-25
标签:Cadence

The Cadence® 25Gbps Multi-Link and Multi-Protocol PHY IP for TSMC 7nm is a high-performance SerDes operating from 1.25 to 25Gbps specifcally designed for infrastructure and datacenter applications. It features long reach equalization capability at very low active and standby power. The SerDes offers very low latency for time critical application for enterprise-level data communications, networking, and storage systems.

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英文文档 25Gbps Multi-Link and Multi-Protocol PHY IP for TSMC 7nm FinFET pdf 91.58KB 52
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